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ICCAD
2010
IEEE
146views Hardware» more  ICCAD 2010»
14 years 7 months ago
Through-silicon-via management during 3D physical design: When to add and how many?
In 3D integrated circuits through silicon vias (TSVs) are used to connect different dies stacked on top of each other. These TSV occupy silicon area and have significantly larger a...
Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Ky...
ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
15 years 3 months ago
Physical design implementation of segmented buses to reduce communication energy
Abstract— The amount of energy consumed for interconnecting the IP-blocks is increasing significantly due to the suboptimal scaling of long wires. To limit this energy penalty, ...
Jin Guo, Antonis Papanikolaou, Pol Marchal, Franck...
IADIS
2008
14 years 11 months ago
Design of Physical Activity Recommendation System
Leisure-time physical activity (LTPA) has been shown to be an effective way of preventing diseases. However 50% of the people who start any type of sports or LTPA drop out of the ...
Ashkan Sami, Ryoichi Nagatomi, Masahiro Terabe, Ka...
ALIFE
1998
14 years 9 months ago
Evolutionary Body Building: Adaptive Physical Designs for Robots
Creating artificial life forms through evolutionary robotics faces a “chicken and egg” problem: learning to control a complex body is dominated by problems specific to its s...
Pablo Funes, Jordan B. Pollack
DATE
2009
IEEE
171views Hardware» more  DATE 2009»
15 years 1 months ago
Physically clustered forward body biasing for variability compensation in nanometer CMOS design
Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have...
Ashoka Visweswara Sathanur, Antonio Pullini, Luca ...