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GECCO
2007
Springer
300views Optimization» more  GECCO 2007»
16 years 1 months ago
A NSGA-II, web-enabled, parallel optimization framework for NLP and MINLP
Engineering design increasingly uses computer simulation models coupled with optimization algorithms to find the best design that meets the customer constraints within a time con...
David J. Powell, Joel K. Hollingsworth
SEMWEB
2007
Springer
16 years 1 months ago
Potluck: Data Mash-Up Tool for Casual Users
As more and more reusable structured data appears on the Web, casual users will want to take into their own hands the task of mashing up data rather than wait for mash-up sites to ...
David F. Huynh, Robert C. Miller, David R. Karger
FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
16 years 1 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
MTV
2006
IEEE
98views Hardware» more  MTV 2006»
16 years 1 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...
CASES
2006
ACM
16 years 1 months ago
Memory optimization by counting points in integer transformations of parametric polytopes
Memory size reduction and memory accesses optimization are crucial issues for embedded systems. In the context of affine programs, these two challenges are classically tackled by ...
Rachid Seghir, Vincent Loechner
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