1192 search results - page 116 / 239 » Instruction Level Distributed Processing |
101
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IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
105
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CCGRID
2008
IEEE
15 years 17 days ago
2008
IEEE
Abstract--The current trend in high performance computing is to aggregate ever larger numbers of processing and interconnection elements in order to achieve desired levels of compu...
HPCA
2009
IEEE
15 years 11 months ago
2009
IEEE
Growing concerns about power have revived interest in in-order pipelines. In-order pipelines sacrifice single-thread performance. Specifically, they do not allow execution to flow...
CASES
2007
ACM
15 years 2 months ago
2007
ACM
The last decade has witnessed the emergence of the Application Specific Instruction-set Processor (ASIP) as a viable platform for embedded systems. Extensible ASIPs allow the user...
CASES
2004
ACM
15 years 2 months ago
2004
ACM
Asynchronous Software Thread Integration (ASTI) provides fine-grain concurrency in real-time threads by statically scheduling (integrating) code from primary threads into secondar...