1192 search results - page 99 / 239 » Instruction Level Distributed Processing |
WETICE
2006
IEEE
15 years 4 months ago
2006
IEEE
In order to capture the increased complexity of products and production processes as well as market requirements, collaboration models representing organisational networks enable ...
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PVM
1998
Springer
15 years 3 months ago
1998
Springer
In this paper we present Lbs, a load-management-system for network based concurrent computing. The system is built on Pt-Pvm, a library based on the PVM system. Pt-Pvm provides mes...
CLUSTER
2007
IEEE
15 years 5 months ago
2007
IEEE
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
HPCA
2006
IEEE
15 years 4 months ago
2006
IEEE
Caches are very inefficiently utilized because not all the excess data fetched into the cache, to exploit spatial locality, is utilized. We define cache utilization as the percent...
IEEEPACT
2003
IEEE
15 years 4 months ago
2003
IEEE
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...