104 search results - page 19 / 21 » Instruction set compiled simulation: a technique for fast an... |
ISCA
2012
IEEE
11 years 8 months ago
2012
IEEE
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
GLVLSI
2010
IEEE
13 years 11 months ago
2010
IEEE
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
BMCBI
2010
13 years 3 months ago
2010
Background: Models for the simulation of metabolic networks require the accurate prediction of enzyme function. Based on a genomic sequence, enzymatic functions of gene products a...
CODES
2008
IEEE
14 years 22 days ago
2008
IEEE
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
ASPLOS
2009
ACM
14 years 6 months ago
2009
ACM
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...