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» Instruction set mapping for performance optimization
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LCTRTS
2005
Springer
15 years 5 months ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
DAC
1993
ACM
15 years 3 months ago
On Area/Depth Trade-off in LUT-Based FPGA Technology Mapping
In this paper we study the area and depth trade-off in LUT based FPGA technology mapping. Starting from a depth-optimal mapping solution, we perform a number of depth relaxation o...
Jason Cong, Yuzheng Ding
ICDE
1998
IEEE
153views Database» more  ICDE 1998»
16 years 1 months ago
Flattening an Object Algebra to Provide Performance
Algebraic transformation and optimization techniques have been the method of choice in relational query execution, but applying them in OODBMS is difficult due to the complexity o...
Peter A. Boncz, Annita N. Wilschut, Martin L. Kers...
DAC
1995
ACM
15 years 3 months ago
A Transformation-Based Approach for Storage Optimization
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
Wei-Kai Cheng, Youn-Long Lin
MICRO
2000
IEEE
98views Hardware» more  MICRO 2000»
15 years 4 months ago
The store-load address table and speculative register promotion
Register promotion is an optimization that allocates a value to a register for a region of its lifetime where it is provably not aliased. Conventional compiler analysis cannot alw...
Matt Postiff, David Greene, Trevor N. Mudge