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FCCM
2006
IEEE
195views VLSI» more  FCCM 2006»
15 years 3 months ago
A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2)
This paper presents a hardware-optimized variant of the well-known Gaussian elimination over GF(2) and its highly efficient implementation. The proposed hardware architecture, we...
Andrey Bogdanov, M. C. Mertens
HPDC
2006
IEEE
15 years 3 months ago
Materializing Highly Available Grids
Grids are becoming a mission-critical component in research and industry. The services they provide are thus required to be highly available, contributing to the vision of the Gri...
Mark Silberstein, Gabriel Kliot, Artyom Sharov, As...
ICPADS
2006
IEEE
15 years 3 months ago
SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code paral...
Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Tayl...
IEEEPACT
2006
IEEE
15 years 3 months ago
Compiling for stream processing
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
Abhishek Das, William J. Dally, Peter R. Mattson
IEEEPACT
2006
IEEE
15 years 3 months ago
Architectural support for operating system-driven CMP cache management
The role of the operating system (OS) in managing shared resources such as CPU time, memory, peripherals, and even energy is well motivated and understood [23]. Unfortunately, one...
Nauman Rafique, Won-Taek Lim, Mithuna Thottethodi
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