27 search results - page 1 / 6 » Interconnect capacitance estimation for FPGAs |
ASPDAC
2004
ACM
15 years 3 months ago
2004
ACM
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
SLIP
2009
ACM
15 years 4 months ago
2009
ACM
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...
DAC
2003
ACM
15 years 2 months ago
2003
ACM
In recent years, due to rapid advances in VLSI manufacturing technology capable of packing more and more devices and wires on a chip, crosstalk has emerged as a serious problem af...
ASPDAC
1999
ACM
15 years 1 months ago
1999
ACM
: In VLSI circuits with deep sub-micron, the parasitic capacitance from interconnect is a very important factor determining circuit performances such as power and time-delay. The B...
VLSID
1999
IEEE
15 years 1 months ago
1999
IEEE
We describe an improved iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. The speed and accuracy of our approach mak...