44 search results - page 5 / 9 » Interconnect design considerations for large NUCA caches |
TVCG
2010
14 years 4 months ago
2010
Abstract--One important bottleneck when visualizing large data sets is the data transfer between processor and memory. Cacheaware (CA) and cache-oblivious (CO) algorithms take into...
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WMPI
2004
ACM
15 years 2 months ago
2004
ACM
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
STORAGESS
2006
ACM
15 years 3 months ago
2006
ACM
New designs for petabyte-scale storage systems are now capable of transferring hundreds of gigabytes of data per second, but lack strong security. We propose a scalable and effici...
HPCA
2011
IEEE
14 years 1 months ago
2011
IEEE
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
ICCAD
1999
IEEE
15 years 1 months ago
1999
IEEE
Abstract-- ECO routing is a very important design capability in advanced IC, MCM and PCB designs when additional routings need to be made at the latter stage of the physical design...