928 search results - page 86 / 186 » Interpolation-sequence based model checking |
102
Voted
FMICS
2006
Springer
15 years 1 months ago
2006
Springer
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
ACSD
2003
IEEE
15 years 1 months ago
2003
IEEE
Abstract. The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling...
ATVA
2004
Springer
15 years 1 months ago
2004
Springer
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a veri...
110
Voted
CCGRID
2006
IEEE
15 years 4 months ago
2006
IEEE
Component-based software construction is widely used in a variety of applications, from embedded environments to grid computing. However, errors in these applications and systems ...
DSD
2004
IEEE
15 years 1 months ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...