63 search results - page 9 / 13 » Interprocedural Load Elimination for Dynamic Optimization of... |
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
CCGRID
2001
IEEE
15 years 1 months ago
2001
IEEE
High performance computing on parallel architectures currently uses different approaches depending on the hardory model of the architecture, the abstraction level of the programmi...
ASPLOS
2008
ACM
14 years 12 months ago
2008
ACM
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
IWOMP
2009
Springer
15 years 2 months ago
2009
Springer
Abstract. Exploiting the full computational power of current hierarchical multiprocessor machines requires a very careful distribution of threads and data among the underlying non-...
HPDC
2007
IEEE
15 years 4 months ago
2007
IEEE
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...