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112
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TVLSI
2008
140views more  TVLSI 2008»
14 years 11 months ago
A Novel Mutation-Based Validation Paradigm for High-Level Hardware Descriptions
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
Jorge Campos, Hussain Al-Asaad
SIPS
2008
IEEE
15 years 6 months ago
Scheduling of dataflow models within the Reconfigurable Video Coding framework
The upcoming Reconfigurable Video Coding (RVC) standard from MPEG (ISO/IEC SC29WG11) defines a library of coding tools to specify existing or new compressed video formats and deco...
Jani Boutellier, Veeranjaneyulu Sadhanala, Christo...
68
Voted
DSD
2002
IEEE
93views Hardware» more  DSD 2002»
15 years 4 months ago
Fault Latencies of Concurrent Checking FSMs
In this paper we introduce concepts of a potential fault latency and a real fault latency for Finite State Machines (FSMs). The potential latency defines a minimal value of the po...
Roman Goot, Ilya Levin, Sergei Ostanin
180
Voted
ICFP
2009
ACM
16 years 9 days ago
Partial memoization of concurrency and communication
Memoization is a well-known optimization technique used to eliminate redundant calls for pure functions. If a call to a function f with argument v yields result r, a subsequent ca...
Lukasz Ziarek, K. C. Sivaramakrishnan, Suresh Jaga...
IPPS
2007
IEEE
15 years 6 months ago
Automatic Trace-Based Performance Analysis of Metacomputing Applications
The processing power and memory capacity of independent and heterogeneous parallel machines can be combined to form a single parallel system that is more powerful than any of its ...
Daniel Becker, Felix Wolf, Wolfgang Frings, Markus...