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ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
15 years 1 months ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha
SASP
2008
IEEE
140views Hardware» more  SASP 2008»
15 years 4 months ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...
EVOW
2003
Springer
15 years 3 months ago
Search Space Analysis of the Linear Ordering Problem
Abstract. The Linear Ordering Problem (LOP) is an NP-hard combinatorial optimization problem that arises in a variety of applications and several algorithmic approaches to its solu...
Tommaso Schiavinotto, Thomas Stützle
HIPEAC
2009
Springer
15 years 4 months ago
Mapping and Synchronizing Streaming Applications on Cell Processors
Developing streaming applications on heterogenous multi-processor architectures like the Cell is difficult. Currently, application developers need to know about hardware details t...
Maik Nijhuis, Herbert Bos, Henri E. Bal, Cé...
EMSOFT
2005
Springer
15 years 3 months ago
Optimizing inter-processor data locality on embedded chip multiprocessors
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
Guilin Chen, Mahmut T. Kandemir