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VTS
2008
IEEE
70views Hardware» more  VTS 2008»
15 years 5 months ago
A Statistical Approach to Characterizing and Testing Functionalized Nanowires
Unlike the top-down photolithographic CMOS VLSI process, cost-effective bulk fabrication of nanodevices calls for a bottom-up approach, generally called self-assembly. Selfassembl...
James Dardig, Haralampos-G. D. Stratigopoulos, Eri...
ISCC
2005
IEEE
15 years 4 months ago
Optimal Delay-Constrained Minimum Cost Loop Algorithm for Local Computer Network
This study deals with the Delay-Constrained Minimum Cost Loop Problem (DC-MCLP) of finding several loops from a source node. The DC-MCLP consists of finding a set of minimum cost ...
Yong-Jin Lee, Mohammed Atiquzzaman
TELSYS
2002
73views more  TELSYS 2002»
14 years 10 months ago
Avoiding Counting to Infinity in Distance Vector Routing
The Routing Information Protocol (RIP) may introduce misleading routing information into the routing table, due to network topology changes such as link or router failures. This is...
Andreas Schmid, Christoph Steigner
97
Voted
AI50
2006
15 years 2 months ago
What Can AI Get from Neuroscience?
The human brain is the best example of intelligence known, with unsurpassed ability for complex, real-time interaction with a dynamic world. AI researchers trying to imitate its re...
Steve M. Potter
ASAP
2006
IEEE
111views Hardware» more  ASAP 2006»
15 years 5 months ago
Fast Bit Compression and Expansion with Parallel Extract and Parallel Deposit Instructions
Current microprocessor instruction set architectures are word oriented, with some subword support. Many important applications, however, can realize substantial performance benefi...
Yedidya Hilewitz, Ruby B. Lee