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» Large Event Traces in Parallel Performance Analysis
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DAC
2003
ACM
16 years 20 days ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
PPOPP
2006
ACM
15 years 5 months ago
A case study in top-down performance estimation for a large-scale parallel application
This work presents a general methodology for estimating the performance of an HPC workload when running on a future hardware architecture. Further, it demonstrates the methodology...
Ilya Sharapov, Robert Kroeger, Guy Delamarter, Raz...
SIGMETRICS
2011
ACM
198views Hardware» more  SIGMETRICS 2011»
14 years 6 months ago
Memory Trace Compression and Replay for SPMD Systems using Extended PRSDs?
Concurrency levels in large-scale supercomputers are rising exponentially, and shared-memory nodes with hundreds of cores and non-uniform memory access latencies are expected with...
Sandeep Budanur, Frank Mueller, Todd Gamblin
EUROPAR
2007
Springer
15 years 3 months ago
Efficient Parallel Simulation of Large-Scale Neuronal Networks on Clusters of Multiprocessor Computers
To understand the principles of information processing in the brain, we depend on models with more than 105 neurons and 109 connections. These networks can be described as graphs o...
Hans E. Plesser, Jochen M. Eppler, Abigail Morriso...
PADS
1996
ACM
15 years 3 months ago
Design of High Level Modelling / High Performance Simulation Environments
Advances in massively parallel platforms are increasing the prospects for high performance discrete event simulation. Still the di culty in parallel programming persists and there...
Bernard P. Zeigler, Doohwan Kim