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103
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ARC
2010
Springer
15 years 3 months ago
2010
Springer
Coarse Grained Reconfigurable Array (CGRA) architectures give high throughput and data reuse for regular algorithms while providing flexibility to execute multiple algorithms on th...
ICASSP
2011
IEEE
14 years 3 months ago
2011
IEEE
Real-time streaming signal processing systems typically desire high throughput and low latency. Many such systems can be modeled as synchronous data flow graphs. In this paper, w...
ISLPED
1996
ACM
15 years 3 months ago
1996
ACM
We present a dynamic programming technique for solving the multiple supply voltage scheduling problem in both nonpipelined and functionally pipelined data-paths. The scheduling pro...
ISSS
1999
IEEE
15 years 4 months ago
1999
IEEE
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP programs. Because of the limited amount of memory in embedded DSPs, a key problem duri...
100
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ICPP
1998
IEEE
15 years 4 months ago
1998
IEEE
Most current compiler analysis techniques are unable to cope with the semantics introduced by explicit parallel and synchronization constructs in parallel programs. In this paper ...