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» Learning Units Design Based in Grid Computing
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135
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DATE
2006
IEEE
195views Hardware» more  DATE 2006»
15 years 9 months ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
111
Voted
ICPR
2008
IEEE
16 years 4 months ago
Pattern rejection strategies for the design of self-paced EEG-based Brain-Computer Interfaces
This paper deals with pattern rejection strategies for self-paced Brain-Computer Interfaces (BCI). First, it introduces two pattern rejection strategies not used yet for self-pace...
Fabien Lotte, Harold Mouchère, Anatole L&ea...
CLEIEJ
2010
15 years 28 days ago
Design, Implementation and Use of a Remote Network Lab with Multiple Users Support as an Aid Teaching Computer Networks
This article presents the design, implementation and use of a remote network lab with multiple users support as an aid to teaching computer networks. The purpose is to enable mult...
Marco Aravena Vivar, Cristian Rodriguez, Andres Ra...
DAC
2011
ACM
14 years 3 months ago
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection
In the era of deep sub-wavelength lithography for nanometer VLSI designs, manufacturability and yield issues are critical and need to be addressed during the key physical design i...
Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan
119
Voted
HPDC
2009
IEEE
15 years 7 months ago
Maestro: a self-organizing peer-to-peer dataflow framework using reinforcement learning
In this paper we describe Maestro, a dataflow computation framework for Ibis, our Java-based grid middleware. The novelty of Maestro is that it is a self-organizing peer-to-peer s...
C. van Reeuwijk