598 search results - page 118 / 120 » Linear Controller Design Limits of Performance |
DAC
1996
ACM
15 years 3 months ago
1996
ACM
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
122
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ASPLOS
2008
ACM
15 years 1 months ago
2008
ACM
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
111
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CCS
2008
ACM
15 years 1 months ago
2008
ACM
Harvard architecture CPU design is common in the embedded world. Examples of Harvard-based architecture devices are the Mica family of wireless sensors. Mica motes have limited me...
89
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WCE
2007
15 years 23 days ago
2007
—This paper presents one of the outcomes of a research project concerned with the development of a method for synthesizing, under controlled conditions in the laboratory, the ran...
98
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CONEXT
2009
ACM
15 years 22 days ago
2009
ACM
The behavior of routing protocols during convergence is critical as it impacts end-to-end performance. Network convergence is particularly important in BGP, the current interdomai...