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» Linear decomposition algorithm for VLSI design applications
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ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
15 years 5 months ago
ILP-based optimization of sequential circuits for low power
The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state e...
Feng Gao, John P. Hayes
TPDS
2010
174views more  TPDS 2010»
14 years 10 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
PODC
2012
ACM
13 years 2 months ago
Byzantine broadcast in point-to-point networks using local linear coding
The goal of Byzantine Broadcast (BB) is to allow a set of fault-free nodes to agree on information that a source node wants to broadcast to them, in the presence of Byzantine faul...
Guanfeng Liang, Nitin H. Vaidya
TCAD
2008
112views more  TCAD 2008»
14 years 10 months ago
A High-Performance Droplet Routing Algorithm for Digital Microfluidic Biochips
In this paper, we propose a high-performance droplet router for a digital microfluidic biochip (DMFB) design. Due to recent advancements in the biomicroelectromechanical system and...
Minsik Cho, David Z. Pan
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
15 years 5 months ago
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri