59 search results - page 8 / 12 » Load Miss Prediction - Exploiting Power Performance Trade-of... |
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
CCE
2008
14 years 9 months ago
2008
Most solid oxide fuel cell (SOFC) modelling efforts emphasize steady-state cell operation. However, understanding the dynamic behaviour is essential to predict the performance and...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
106
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ADHOC
2005
14 years 9 months ago
2005
Mobility in ad hoc networks causes frequent link failures, which in turn causes packet losses. TCP attributes these packet losses to congestion. This incorrect inference results i...
89
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HPCA
2001
IEEE
15 years 10 months ago
2001
IEEE
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...