739 search results - page 61 / 148 » Locally Parallel Texture Modeling |
186
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IPPS
1997
IEEE
15 years 9 months ago
1997
IEEE
We present the Data Parallel Fortran (DPF) benchmark suite, a set of data parallel Fortran codes forevaluatingdata parallel compilers appropriatefor any target parallel architectu...
132
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IEEEPACT
2009
IEEE
15 years 11 months ago
2009
IEEE
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
126
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PODC
2009
ACM
16 years 5 months ago
2009
ACM
d Abstract] Prosenjit Bose School of Computer Science Carleton University Ottawa, Canada jit@scs.carleton.ca Paz Carmi Dept. of Computer Science Ben-Gurion Univ. of the Negev Beer-...
167
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IPPS
2006
IEEE
15 years 10 months ago
2006
IEEE
FPGA chips in reconfigurable computer systems are used as malleable coprocessors where components of a hardware library of functions can be configured as needed. As the number of ...
214
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IPPS
2007
IEEE
15 years 11 months ago
2007
IEEE
This paper deals with the use of parallel processing for multi-objective optimization in applications in which the objective functions, the restrictions, and hence also the soluti...