Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
— We propose a new probabilistic temporal logic iLTL which captures properties of systems whose state can be represented by probability mass functions (pmf’s). Using iLTL, we c...
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
Zhenyu (Peter) Gu, Jia Wang, Robert P. Dick, Hai Z...
This paper proposes a D-algebra to compose decisions from multiple access control policies. Compared to other algebrabased approaches aimed at policy composition, D-algebra is the...
Abstract. Radio Link Quality Estimation (LQE) is a fundamental building block for Wireless Sensor Networks, namely for a reliable deployment, resource management and routing. Exist...
Nouha Baccour, Anis Koubaa, Habib Youssef, Maissa ...