1010 search results - page 173 / 202 » Logics for Contravariant Simulations |
127
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GLVLSI
1998
IEEE
15 years 6 months ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
116
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ICCAD
1998
IEEE
15 years 6 months ago
1998
IEEE
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
111
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ICRA
1998
IEEE
15 years 6 months ago
1998
IEEE
Models of human control strategy (HCS), which accurately emulate dynamic human behavior, have far reaching potential in areas ranging from robotics to virtual reality to the intel...
ISCA
1998
IEEE
15 years 6 months ago
1998
IEEE
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...
113
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PODC
1997
ACM
15 years 6 months ago
1997
ACM
Thispaperdescribesanewschemeforguaranteeingthattransactions in a client/server system observe consistent state while they are running. The scheme is presented in conjunction with ...