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CODES
2004
IEEE
15 years 1 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
CF
2006
ACM
15 years 1 months ago
An efficient cache design for scalable glueless shared-memory multiprocessors
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...
Alberto Ros, Manuel E. Acacio, José M. Garc...
EDO
2006
Springer
15 years 1 months ago
An extensible, lightweight architecture for adaptive J2EE applications
Server applications with adaptive behaviors can adapt their functionality in response to environmental changes, and significantly reduce the on-going costs of system deployment an...
Ian Gorton, Yan Liu, Nihar Trivedi
103
Voted
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
15 years 1 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
ICSE
2010
IEEE-ACM
14 years 11 months ago
SMT-based bounded model checking for multi-threaded software in embedded systems
The transition from single-core to multi-core processors has made multi-threaded software an important subject over the last years in computer-aided verification. Model checkers ...
Lucas Cordeiro