125 search results - page 15 / 25 » Loop Striping: Maximize Parallelism for Nested Loops |
ASAP
2006
IEEE
15 years 3 days ago
2006
IEEE
This paper proposes a novel parallel approach for pipelining of nested multiplexer loops to design high speed decision feedback equalizers (DFEs) based on look-ahead techniques. I...
SC
1994
ACM
15 years 2 months ago
1994
ACM
Most current data dependence tests cannot handle loop bounds or array subscripts that are symbolic, nonlinear expressions e.g. Ani+j, where 0 j n. In this paper, we describe a d...
JPDC
2006
14 years 10 months ago
2006
We address the problem of efficient out-of-core code generation for a special class of imperfectly nested loops encoding tensor contractions arising in quantum chemistry computati...
81
Voted
SC
1992
ACM
15 years 2 months ago
1992
ACM
Exploiting parallelism at both the multiprocessor level and the instruction level is an e ective means for supercomputers to achieve high-performance. The amount of instruction-le...
ICPP
1996
IEEE
15 years 2 months ago
1996
IEEE
Tiling exploits temporal reuse carried by an outer loop of a loop nest to enhance cache locality. Loop skewing is typically required to make tiling legal. This restricts parallelis...