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CCGRID
2001
IEEE
15 years 3 months ago
A DSM Cluster Architecture Supporting Aggressive Computation in Active Networks
Active networks allow computations to be performed innetwork at routers as messages pass through them. Active networks offer unique opportunities to optimize networkcentric applic...
Peter C. J. Graham
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
16 years 2 days ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
IPPS
1999
IEEE
15 years 4 months ago
Hardwired-Clusters Partial-Crossbar: A Hierarchical Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
SIPS
2008
IEEE
15 years 6 months ago
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
Bhavana B. Manjunath, Aaron S. Williams, Chaitali ...
IPPS
2007
IEEE
15 years 6 months ago
Optimized Inverted List Assignment in Distributed Search Engine Architectures
We study efficient query processing in distributed web search engines with global index organization. The main performance bottleneck in this case is due to the large amount of i...
Jiangong Zhang, Torsten Suel