Sciweavers

1307 search results - page 208 / 262
» Low Power Hardware for a High Performance PDA
Sort
View
ISCAS
2006
IEEE
124views Hardware» more  ISCAS 2006»
15 years 8 months ago
Systematic design flow for dynamic data management in visual texture decoder of MPEG-4
Abstract— There is a clear trend of future embedded systems in moving toward wireless, multimedia, multi-functional and ubiquitous applications. This emerges new challenges in th...
Alexandros Bartzas, Miguel Peón Quiró...
GRAPHICSINTERFACE
2008
15 years 3 months ago
Semantic pointing for object picking in complex 3D environments
Today's large and high-resolution displays coupled with powerful graphics hardware offer the potential for highly realistic 3D virtual environments, but also cause increased ...
Niklas Elmqvist, Jean-Daniel Fekete
ICS
2009
Tsinghua U.
15 years 6 months ago
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
Mohammad Arjomand, Hamid Sarbazi-Azad
115
Voted
ET
2002
122views more  ET 2002»
15 years 1 months ago
Using At-Speed BIST to Test LVDS Serializer/Deserializer Function
LVDS is the acronym for Low-Voltage-DifferentialSignaling and is described in both the ANSI/TIA/EIA644 and IEEE 1596.3 standards. High performance yet Low Power and EMI have made ...
Magnus Eckersand, Fredrik Franzon, Ken Filliter
ISCAS
2005
IEEE
122views Hardware» more  ISCAS 2005»
15 years 7 months ago
A mixed analog-digital hybrid for speech enhancement purposes
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...
Benny Sallberg, Mattias Dahl, Henrik Akesson, Ingv...