Test pattern decompression techniques are bounded with the algorithm of test pattern ordering and test data flow controlling. Some of the methods could have more sophisticated sor...
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
— This paper describes two robotic systems developed for acquiring accurate volumetric maps of underground mines. One system is based on a cart instrumented by laser range finde...
— We develop a joint playout buffer and Forward Error Correction (FEC) adjustment scheme for Internet Telephony, which incorporates the impact of end-to-end delay on the perceive...
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cav...