36 search results - page 2 / 8 » Low-energy embedded FPGA structures |
ISLPED
1998
ACM
13 years 10 months ago
1998
ACM
This paper introduces an energy-efficient FPGA module, intended for embedded implementations. The main features of the proposed cell include a rich local-interconnect network, whi...
ISSS
2002
IEEE
13 years 11 months ago
2002
IEEE
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
ICMCS
2005
IEEE
13 years 12 months ago
2005
IEEE
The paper presents a high-performance architecture of the bit-plane coder for the embedded block coding algorithm in JPEG 2000. The architecture adopts a pipeline structure and is...
FPGA
2005
ACM
13 years 11 months ago
2005
ACM
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
FPL
2011
Springer
12 years 6 months ago
2011
Springer
In this paper two compact hardware structures for the computation of the CLEFIA encryption algorithm are presented. One structure based on the existing state of the art and a nove...