Sciweavers

165 search results - page 10 / 33
» Low-power circuits using dynamic threshold devices
Sort
View
ASPDAC
2008
ACM
92views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Decomposition based approach for synthesis of multi-level threshold logic circuits
Scaling is currently the most popular technique used to improve performance metrics of CMOS circuits. This cannot go on forever because the properties that are responsible for the ...
Tejaswi Gowda, Sarma B. K. Vrudhula
64
Voted
ISCAS
2002
IEEE
103views Hardware» more  ISCAS 2002»
15 years 2 months ago
A SPICE model for single electronics
With single-electron tunneling (SET) technology it is possible to build electronic circuits with extreme low power properties. These SET circuits must therefore operate in the sin...
R. van de Haar, J. Hoekstra, R. H. Klunder
GLVLSI
2007
IEEE
171views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Combinational equivalence checking for threshold logic circuits
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevo...
ASPDAC
2005
ACM
115views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Low-power domino circuits using NMOS pull-up on off-critical paths
- Domino logic is used extensively in high speed microprocessor datapath design. Although domino gates have small propagation delay, they consume relatively more power. We propose ...
Abdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhij...
SBCCI
2003
ACM
160views VLSI» more  SBCCI 2003»
15 years 2 months ago
Novel Design Methodology for High-Performance XOR-XNOR Circuit Design
As we scale down to deep submicron (DSM) technology, noise is becoming a metric of equal importance as power, speed, and area. Smaller feature sizes, low voltage, and high frequen...
Sumeer Goel, Mohamed A. Elgamel, Magdy A. Bayoumi