1342 search results - page 26 / 269 » MEMS Design And Verification |
90
Voted
TCAD
2008
14 years 9 months ago
2008
Due to the increasing abstraction gap between the initial system model and a final implementation, the verification of the respective models against each other is a formidable task...
80
Voted
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Previous results show that both flat and hierarchical methodologies present obstacles to effectively completing combinational equivalence checking. A new approach that combines th...
VLSID
2006
IEEE
15 years 3 months ago
2006
IEEE
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
66
Voted
IEEEPACT
2007
IEEE
15 years 4 months ago
2007
IEEE
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
101
click to vote
DAC
1996
ACM
15 years 1 months ago
1996
ACM
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...