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CODES
2011
IEEE
13 years 9 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
ISARCS
2010
156views Hardware» more  ISARCS 2010»
14 years 11 months ago
A Road to a Formally Verified General-Purpose Operating System
Methods of formal description and verification represent a viable way for achieving fundamentally bug-free software. However, in reality only a small subset of the existing operati...
Martin Decký
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
15 years 1 months ago
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Sto...
TSMC
2008
113views more  TSMC 2008»
14 years 9 months ago
Computational Methods for Verification of Stochastic Hybrid Systems
Stochastic hybrid system (SHS) models can be used to analyze and design complex embedded systems that operate in the presence of uncertainty and variability. Verification of reacha...
Xenofon D. Koutsoukos, Derek Riley
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
15 years 4 months ago
Learning early-stage platform dimensioning from late-stage timing verification
— Today's innovations in the automotive sector are, to a great extent, based on electronics. The increasing integration complexity and stringent cost reduction goals turn E/...
Kai Richter, Marek Jersak, Rolf Ernst