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FPL
2003
Springer
80views Hardware» more  FPL 2003»
15 years 7 months ago
High-Level Design Tools for FPGA-Based Combinatorial Accelerators
Analysis of different combinatorial search algorithms has shown that they have a set of distinctive features in common. The paper suggests a number of reusable blocks that support ...
Valery Sklyarov, Iouliia Skliarova, Pedro Almeida,...
90
Voted
DAC
2008
ACM
16 years 2 months ago
DVFS in loop accelerators using BLADES
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott...
CASES
2010
ACM
14 years 12 months ago
Resource recycling: putting idle resources to work on a composable accelerator
Mobile computing platforms in the form of smart phones, netbooks, and personal digital assistants have become an integral part of our everyday lives. Moving ahead to the future, m...
Yongjun Park, Hyunchul Park, Scott A. Mahlke, Sukj...
FCCM
2009
IEEE
165views VLSI» more  FCCM 2009»
15 years 8 months ago
Accelerating Quadrature Methods for Option Valuation
This paper presents an architecture for FPGA acceleration of quadrature methods used for pricing complex options, such as discrete barrier, Bermudan, and American options. The arc...
Anson H. T. Tse, David B. Thomas, Wayne Luk
119
Voted
FPGA
2009
ACM
273views FPGA» more  FPGA 2009»
15 years 8 months ago
A parallel/vectorized double-precision exponential core to accelerate computational science applications
Many natural processes exhibit exponential decay and, consequently, computational scientists make extensive use of e−x in computer simulation experiments. While it is common to ...
Robin Pottathuparambil, Ron Sass