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TVLSI
2011
216views more  TVLSI 2011»
14 years 5 months ago
Energy and Performance Models for Synchronous and Asynchronous Communication
—Communication costs, which have the potential to throttle design performance as scaling continues, are mathematically modeled and compared for various pipeline methodologies. Fi...
Kenneth S. Stevens, Pankaj Golani, Peter A. Beerel
82
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EWC
2011
112views more  EWC 2011»
14 years 1 months ago
CAD-integrated analysis of 3-D beams: a surface-integration approach
1 Most engineering artifacts are designed and analyzed2 today within a 3-D computer aided design (CAD)3 environment. However, slender objects such as beams are4 designed in a 3-D e...
Wa'el Abdel Samad, Krishnan Suresh
ISCA
2012
IEEE
242views Hardware» more  ISCA 2012»
13 years 17 days ago
Side-channel vulnerability factor: A metric for measuring information leakage
There have been many attacks that exploit side-effects of program execution to expose secret information and many proposed countermeasures to protect against these attacks. Howeve...
John Demme, Robert Martin, Adam Waksman, Simha Set...
ASPDAC
2005
ACM
97views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Opportunities and challenges for better than worst-case design
The progressive trend of fabrication technologies towards the nanometer regime has created a number of new physical design challenges for computer architects. Design complexity, u...
Todd M. Austin, Valeria Bertacco, David Blaauw, Tr...
CODES
2006
IEEE
15 years 4 months ago
Floorplan driven leakage power aware IP-based SoC design space exploration
Multi-million gate System-on-Chip (SoC) designs increasingly rely on Intellectual Property (IP) blocks. However, due to technology scaling the leakage power consumption of the IP ...
Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal...