391 search results - page 10 / 79 » Massively parallel processing on a chip |
167
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TCSV
2010
14 years 10 months ago
2010
Abstract--Real-time stereo vision is attractive in many applications like robot navigation and 3D scene reconstruction. Data parallel platforms, e.g. GPU, is often used for real-ti...
127
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DAC
2008
ACM
16 years 4 months ago
2008
ACM
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
121
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IPPS
2008
IEEE
15 years 10 months ago
2008
IEEE
Accurate, reproducible and comparable measurement of collective operations is a complicated task. Although Different measurement schemes are implemented in wellknown benchmarks, m...
122
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ISPAN
2005
IEEE
15 years 9 months ago
2005
IEEE
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
133
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...