Sciweavers

34 search results - page 1 / 7
» Maximizing data reuse for minimizing memory space requiremen...
Sort
View
60
Voted
ASPDAC
2006
ACM
105views Hardware» more  ASPDAC 2006»
15 years 4 months ago
Maximizing data reuse for minimizing memory space requirements and execution cycles
Mahmut T. Kandemir, Guangyu Chen, Feihui Li
87
Voted
SASP
2009
IEEE
222views Hardware» more  SASP 2009»
15 years 5 months ago
A memory optimization technique for software-managed scratchpad memory in GPUs
—With the appearance of massively parallel and inexpensive platforms such as the G80 generation of NVIDIA GPUs, more real-life applications will be designed or ported to these pl...
Maryam Moazeni, Alex A. T. Bui, Majid Sarrafzadeh
102
Voted
EMSOFT
2005
Springer
15 years 3 months ago
Optimizing inter-processor data locality on embedded chip multiprocessors
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
Guilin Chen, Mahmut T. Kandemir
ICPP
1998
IEEE
15 years 2 months ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
78
Voted
IPPS
2000
IEEE
15 years 2 months ago
Combining Fusion Optimizations and Piecewise Execution of Nested Data-Parallel Programs
Abstract. Nested data-parallel programs often have large memory requirements due to their high degree of parallelism. Piecewise execution is an implementation technique used to min...
W. Pfannenstiel