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» Measuring Multicore Performance
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CODES
2011
IEEE
13 years 9 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
IPPS
2009
IEEE
15 years 4 months ago
Core-aware memory access scheduling schemes
Multi-core processors have changed the conventional hardware structure and require a rethinking of system scheduling and resource management to utilize them efficiently. However, ...
Zhibin Fang, Xian-He Sun, Yong Chen, Surendra Byna
EMSOFT
2009
Springer
15 years 4 months ago
Flexible filters: load balancing through backpressure for stream programs
Stream processing is a promising paradigm for programming multi-core systems for high-performance embedded applications. We propose flexible filters as a technique that combines...
Rebecca L. Collins, Luca P. Carloni
JSSPP
2010
Springer
14 years 7 months ago
Proposal and Evaluation of APIs for Utilizing Inter-Core Time Aggregation Scheduler
This paper proposes and evaluates APIs for Inter-Core Time Aggregation Scheduler (IAS), which is a kernel-level thread scheduler to enhance performances of multi-threaded programs ...
Satoshi Yamada, Shigeru Kusakabe
APPT
2009
Springer
15 years 4 months ago
A Fast Scheme to Investigate Thermal-Aware Scheduling Policy for Multicore Processors
Abstract. With more cores integrated into one single chip, the overall power consumption from the multiple concurrent running programs increases dramatically in a CMP processor whi...
Liqiang He, Cha Narisu