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ICPP
1997
IEEE
15 years 8 months ago
How Much Does Network Contention Affect Distributed Shared Memory Performance?
Most of recent research on distributed shared memory (DSM)systems have focused on either careful design of node controllersor cache coherenceprotocols. Whileevaluating these desig...
Donglai Dai, Dhabaleswar K. Panda
VISUALIZATION
1992
IEEE
15 years 8 months ago
Display of Scientific Data Structures for Algorithm Visualization
algorithms as networks of modules. The data flow architecture is popular because of the flexibility of mixing calculation modules with display modules, and because of its easy grap...
William L. Hibbard, Charles R. Dyer, Brian E. Paul
ATAL
2006
Springer
15 years 6 months ago
Mertacor: a successful autonomous trading agent
In this paper we present the internal architecture and bidding mechanisms designed for Mertacor, a successful trading agent, which ended up first in the Classic Trading Agent Comp...
Panos Toulis, Dionisis Kehagias, Pericles A. Mitka...
ASAP
2007
IEEE
112views Hardware» more  ASAP 2007»
15 years 6 months ago
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
Alain Darte, C. Quinson
SPLC
2000
15 years 6 months ago
Two Novel Concepts for systematic product line development
: Framelets and implementation cases are new concepts to manage the complexity of product line development. Framelets are "small product lines" that address, as self-stan...
Alessandro Pasetti, Wolfgang Pree