Test access mechanisms (TAMs) and test wrappers are integral parts of a system-on-chip (SOC) test architecture. Prior research has concentrated on only one aspect of the TAM/wrappe...
Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan M...
Presented at First Electrical Science Divisional Symposium, Indian Institute of Science.
This is joint work with Prof David Parkes, Harvard University.
In this work we present a novel control design methodology for under-actuated mechanical systems. As part of the design process we use the reachability analysis tool d/dt [ABDM99,D...
Eugene Asarin, Sorav Bansal, Bernard Espiau, Thao ...
—The 3D IC integration using through-silicon-vias (TSV) has gained tremendous momentum recently for industry adoption. However, as TSV involves disruptive manufacturing technolog...
David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Mo...
Traditional performance analysis of approximation algorithms considers overall performance, while economic fairness analysis focuses on the individual performance each user receiv...