1184 search results - page 145 / 237 » Memory Design for Constrained Dynamic Optimization Problems |
128
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INFOCOM
2006
IEEE
15 years 8 months ago
2006
IEEE
— We design network topologies and routing strategies which optimize several measures simultaneously: low cost, small routing diameter , bounded degree and low congestion. This s...
219
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GECCO
2009
Springer
15 years 8 days ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
124
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HIPEAC
2007
Springer
15 years 8 months ago
2007
Springer
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
119
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ICCAD
1998
IEEE
15 years 6 months ago
1998
IEEE
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
122
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AUTOMATICA
2010
15 years 2 months ago
2010
This paper addresses robust deconvolution filtering when the system and noise dynamics are obtained by parametric system identification. Consistent with standard identification me...