Sciweavers

820 search results - page 32 / 164
» Memory System Connectivity Exploration
Sort
View
CSCW
2008
ACM
15 years 3 months ago
SPARCS: exploring sharing suggestions to enhance family connectedness
Staying in touch with extended family members can be a challenge in part because of the time and effort required, even with the help of current technologies. To explore the value ...
A. J. Bernheim Brush, Kori M. Inkpen, Kimberly Tee
RSP
2006
IEEE
120views Control Systems» more  RSP 2006»
15 years 8 months ago
A Case Study of Design Space Exploration for Embedded Multimedia Applications on SoCs
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
Isabelle Hurbain, Corinne Ancourt, François...
SWAT
2004
Springer
120views Algorithms» more  SWAT 2004»
15 years 7 months ago
Railway Delay Management: Exploring Its Algorithmic Complexity
We consider delay management in railway systems. Given delayed trains, we want to find a waiting policy for the connecting trains minimizing the weighted total passenger delay. If...
Michael Gatto, Björn Glaus, Riko Jacob, Leon ...
CIBCB
2008
IEEE
15 years 3 months ago
Network motifs in context: An exploration of the evolution of oscillatory dynamics in transcriptional networks
The concept of a network motif--a small set of interacting genes which produce a predictable behaviour at the network level--has attracted considerable attention amongst network an...
Jennifer Hallinan, Anil Wipat
123
Voted
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
15 years 7 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen