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» Memory System Connectivity Exploration
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DAC
2010
ACM
15 years 3 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
146
Voted
CODES
2007
IEEE
15 years 9 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
IPPS
2007
IEEE
15 years 9 months ago
MultiEdge: An Edge-based Communication Subsystem for Scalable Commodity Servers
At the core of contemporary high performance computer systems is the communication infrastructure. For this reason, there has been a lot of work on providing low-latency, high-ban...
Sven Karlsson, Stavros Passas, George Kotsis, Ange...
APN
2007
Springer
15 years 9 months ago
The ComBack Method - Extending Hash Compaction with Backtracking
This paper presents the ComBack method for explicit state space exploration. The ComBack method extends the well-known hash compaction method such that full coverage of the state s...
Michael Westergaard, Lars Michael Kristensen, Gert...
FLOPS
2006
Springer
15 years 7 months ago
Lock Free Data Structures Using STM in Haskell
Abstract. This paper explores the feasibility of re-expressing concurrent algorithms with explicit locks in terms of lock free code written using Haskell's implementation of s...
Anthony Discolo, Tim Harris, Simon Marlow, Simon L...