Sciweavers

3202 search results - page 39 / 641
» Memory access scheduling
Sort
View
VMCAI
2009
Springer
15 years 8 months ago
A Scalable Memory Model for Low-Level Code
Abstract. Because of its critical importance underlying all other software, lowlevel system software is among the most important targets for formal verification. Low-level systems...
Zvonimir Rakamaric, Alan J. Hu
FCCM
2007
IEEE
124views VLSI» more  FCCM 2007»
15 years 8 months ago
A Hybrid Memory Sub-system for Video Coding Applications
This paper introduces a parameterisable, application and platform-independent, hybrid memory sub-system for custom hardware. This memory sub-system consists of a scratchpad memory...
Su-Shin Ang, George A. Constantinides, Wayne Luk, ...
139
Voted
ISCA
2012
IEEE
274views Hardware» more  ISCA 2012»
13 years 4 months ago
The dynamic granularity memory system
Chip multiprocessors enable continued performance scaling with increasingly many cores per chip. As the throughput of computation outpaces available memory bandwidth, however, the...
Doe Hyun Yoon, Min Kyu Jeong, Michael Sullivan, Ma...
OSDI
2008
ACM
16 years 1 months ago
Memory-aware Scheduling for Energy Efficiency on Multicore Processors
Memory bandwidth is a scarce resource in multicore systems. Scheduling has a dramatic impact on the delay introduced by memory contention, but also on the effectiveness of frequen...
Andreas Merkel, Frank Bellosa
MICRO
1999
IEEE
98views Hardware» more  MICRO 1999»
15 years 5 months ago
Access Region Locality for High-Bandwidth Processor Memory System Design
This paper studies an interesting yet less explored behavior of memory access instructions, called access region locality. Unlike the traditional temporal and spatial data localit...
Sangyeun Cho, Pen-Chung Yew, Gyungho Lee