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ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
15 years 10 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
120
Voted
WCE
2007
15 years 3 months ago
Sparse Matrix Multiplication Using UPC
—Partitioned global address space (PGAS) languages, such as Unified Parallel C (UPC) have the promise of being productive. Due to the shared address space view that they provide,...
Hoda El-Sayed, Eric Wright
163
Voted
VLDB
2002
ACM
154views Database» more  VLDB 2002»
15 years 1 months ago
I/O-Conscious Data Preparation for Large-Scale Web Search Engines
Given that commercial search engines cover billions of web pages, efficiently managing the corresponding volumes of disk-resident data needed to answer user queries quickly is a f...
Maxim Lifantsev, Tzi-cker Chiueh
137
Voted
MICRO
2010
IEEE
142views Hardware» more  MICRO 2010»
14 years 11 months ago
Virtual Snooping: Filtering Snoops in Virtualized Multi-cores
Virtualization has been rapidly expanding its applications in numerous server and desktop environments to improve the utilization and manageability of physical systems. Such prolif...
Daehoon Kim, Hwanju Kim, Jaehyuk Huh
ICPP
2003
IEEE
15 years 7 months ago
Scheduling Algorithms with Bus Bandwidth Considerations for SMPs
The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
Christos D. Antonopoulos, Dimitrios S. Nikolopoulo...