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DAC
1996
ACM
13 years 10 months ago
Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerra...
ICPR
2004
IEEE
14 years 7 months ago
Using Multiple Graphics Cards as a General Purpose Parallel Computer : Applications to Computer Vision
Pattern recognition and computer vision tasks are computationally intensive, repetitive, and often exceed the capabilities of the CPU, leaving little time for higher level tasks. ...
James Fung, Steve Mann
CGF
2010
143views more  CGF 2010»
13 years 3 months ago
A Smoke Visualization Model for Capturing Surface-Like Features
Incense, candle smoke and cigarette smoke often exhibit smoke flows with a surface-like appearance. Although delving into well-known computational fluid dynamics may provide a sol...
Jinho Park, Yeongho Seol, Frederic Cordier, Junyon...
HPCA
2008
IEEE
14 years 6 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
BMCBI
2008
214views more  BMCBI 2008»
13 years 6 months ago
Accelerating String Set Matching in FPGA Hardware for Bioinformatics Research
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
Yoginder S. Dandass, Shane C. Burgess, Mark Lawren...