This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
John H. Kelm, Daniel R. Johnson, Steven S. Lumetta...
Abstract. We present an approach to static priority preemptive process scheduling for the synthesis of hard realtime distributed embedded systems where communication plays an impor...
The current period of IT development is characterized by an explosive growth of diverse information representation languages. Applying integration and composition of heterogeneous ...
Leonid A. Kalinichenko, Sergey A. Stupnikov, Nikol...
Abstract. While processor based systems often enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reconfigurable har...
Abstract— This paper presents synthesis of Hardware Dependent Software (HdS) for multicore and many-core designs using Embedded System Environment (ESE). ESE is a tool set, devel...