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» Memory modeling for system synthesis
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DATE
2005
IEEE
97views Hardware» more  DATE 2005»
15 years 5 months ago
Synchronization Processor Synthesis for Latency Insensitive Systems
In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carlon...
Pierre Bomel, Eric Martin, Emmanuel Boutillon
AGI
2008
15 years 1 months ago
Text Disambiguation by Educable AI System
The structure of possible text understanding system is discussed. To store concepts and knowledge system uses multilayer ontology based on pragmatic memory model. The way of knowle...
Alexander Voskresenskij
CDC
2009
IEEE
115views Control Systems» more  CDC 2009»
14 years 9 months ago
A multiplay model for rate-independent and rate-dependent hysteresis with nonlocal memory
Abstract-- We consider the multiplay model for hysteresis with nonlocal memory. This model consists of N mass/spring/dashpot with deadzone elements. The hysteresis map of the multi...
Bojana Drincic, Dennis S. Bernstein
ECRTS
2002
IEEE
15 years 4 months ago
Managing Multi-Mode Tasks with Time Cost and Quality Levels using Optimal Discrete Control Synthesis
Real-time control systems are complex to design, and automation support is important. We are interested in systems with multiple tasks, each with multiple modes, implementing a fu...
Hervé Marchand, Éric Rutten
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
15 years 8 months ago
Formal model of data reuse analysis for hierarchical memory organizations
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
Ilie I. Luican, Hongwei Zhu, Florin Balasa