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GLVLSI
2006
IEEE
115views VLSI» more  GLVLSI 2006»
15 years 10 months ago
Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology
This paper presents a systematic design methodology for yield enhancement of asynchronous logic circuits using 3-D (3-Dimensional) integration technology. In this design, the targ...
Song Peng, Rajit Manohar
ROBIO
2006
IEEE
208views Robotics» more  ROBIO 2006»
15 years 10 months ago
Stiffness Optimization of a 3-DOF Parallel Kinematic Machine Using Particle Swarm Optimization
Abstract— In this paper, the architectural parameters optimization of a three-prismatic-universal-universal (3-PUU) parallel kinematic machine (PKM) with three translational degr...
Qingsong Xu, Yangmin Li
ICIP
2005
IEEE
15 years 10 months ago
Interactive 3D filter design for ultrasound artifact reduction
A method for detecting and reducing reverberation artifacts in ultrasound image sequences is described. A reverberation artifact localization map is produced using local Rf-bandwi...
Nina Eriksson Bylund, Mats T. Andersson, Hans Knut...
ISVC
2005
Springer
15 years 9 months ago
3D Hand Pose Reconstruction with ISOSOM
Abstract. We present an appearance-based 3D hand posture estimation method that determines a ranked set of possible hand posture candidates from an unmarked hand image, based on an...
Haiying Guan, Matthew Turk
SINOBIOMETRICS
2004
Springer
15 years 9 months ago
Pose Normalization Using Generic 3D Face Model as a Priori for Pose-Insensitive Face Recognition
Abrupt performance degradation caused by face pose variations has been one of the bottlenecks for practical face recognition applications. This paper presents a practical pose norm...
Xiujuan Chai, Shiguang Shan, Wen Gao, Xin Liu