33 search results - page 5 / 7 » Micro Architecture Coverage Directed Generation of Test Prog... |
115
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TACAS
2012
Springer
13 years 5 months ago
2012
Springer
FShell is an automated white-box test-input generator for C programs, computing test data with respect to user-specified code coverage criteria. The pillars of FShell are the decl...
SAC
2008
ACM
14 years 9 months ago
2008
ACM
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed testing of high-speed embedded processors testing in an SoC system. For SBST, test rout...
102
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MICRO
2003
IEEE
15 years 2 months ago
2003
IEEE
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
112
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ESORICS
2002
Springer
15 years 9 months ago
2002
Springer
Resource security pertains to the prevention of unauthorized usage of system resources that may not directly cause corruption or leakage of information. A common breach of resource...
DAC
2000
ACM
15 years 10 months ago
2000
ACM
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...