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72
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ISLPED
2004
ACM
122views Hardware» more  ISLPED 2004»
15 years 2 months ago
Microarchitectural techniques for power gating of execution units
Leakage power is a major concern in current and future microprocessor designs. In this paper, we explore the potential of architectural techniques to reduce leakage through power-...
Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan,...
98
Voted
IPCCC
2007
IEEE
15 years 3 months ago
Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization
Leakage power is a major concern in current microarchitectures as it is increasing exponentially with decreasing transistor feature sizes. In this paper, we present a technique ca...
Santosh Talli, Ram Srinivasan, Jeanine Cook
85
Voted
PATMOS
2005
Springer
15 years 3 months ago
Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications
In this paper, we present a low power high temperature 80C51 microcontroller. The low power optimizations are applied at gate and architectural level, by using extensive clock and ...
Philippe Manet, David Bol, Renaud Ambroise, Jean-D...
80
Voted
ISLPED
2004
ACM
102views Hardware» more  ISLPED 2004»
15 years 2 months ago
Microarchitectural power modeling techniques for deep sub-micron microprocessors
The need to perform early design studies that combine architectural simulation with power estimation has become critical as power has become a design constraint whose importance h...
Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M...
ISCAS
2008
IEEE
136views Hardware» more  ISCAS 2008»
15 years 3 months ago
"Green" micro-architecture and circuit co-design for ternary content addressable memory
—In this paper, an energy-efficient and high performance ternary content addressable memory (TCAM) are presented. It employs the concept of “green” microarchitecture and circ...
Po-Tsang Huang, Shu-Wei Chang, Wen-Yen Liu, Wei Hw...